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[Other resource] verilog实现ALU的源代码

Description: verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
Platform: | Size: 1382 | Author: 飞扬 | Hits:

[ARM-PowerPC-ColdFire-MIPS] signal_cpu_sort

Description: Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.-Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.
Platform: | Size: 8192 | Author: 張大小 | Hits:

[VHDL-FPGA-Verilog] alu_inverter

Description: 4bit ALU 利用vhdl语言编写的4位ALU 开发环境是在windows下-Band ALU using VHDL language prepared by the four ALU is a development environment under Windows
Platform: | Size: 18432 | Author: bob | Hits:

[VHDL-FPGA-Verilog] Example-2-5

Description: 这些是verilog编程实例5,仅供参考-These are examples of Verilog Programming 5 for reference
Platform: | Size: 74752 | Author: john | Hits:

[VHDL-FPGA-Verilog] Quaalu

Description: ALU算术逻辑单元的简单实现,利用VHDL语言编写,可进行加法,减法,以及位的左右移动,只需一个时钟脉冲-ALU arithmetic logic unit to achieve a simple, using VHDL language, can be additive, subtractive, and the place and move around only one clock pulse
Platform: | Size: 103424 | Author: Jake | Hits:

[VHDL-FPGA-Verilog] 8051core-Verilog

Description: 利用verlilog hdl语言编程，完成了8051内核，非常值得学习硬件描述语言的人看看！-Verlilog hdl programming language to use to complete the 8051 core, very much worth learning hardware description language of the people to see!
Platform: | Size: 53248 | Author: 小方 | Hits:

[VHDL-FPGA-Verilog] alu

Description: 16位RISC CPU的ALU，使用VHDL编写-16-bit RISC CPU
Platform: | Size: 2048 | Author: 李斌 | Hits:

[VHDL-FPGA-Verilog] alu3

Description: 用verilog语言编写，一个8-bit ALU，可以完成按字节的+、-和与、或、非操作-Using Verilog language, an 8-bit ALU, to be completed by byte+,- And, or, non-operating
Platform: | Size: 203776 | Author: 徐芬 | Hits:

[VHDL-FPGA-Verilog] alu-div

Description: 用verilog HDL代码编写的快速除法器，比较有用
Platform: | Size: 15360 | Author: 徐芬 | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 使用verilog作为CPU设计语言实现单数据通路五级流水线的CPU。具有32个通用寄存器、一个程序计数器PC、一个标志寄存器FLAG，一个堆栈寄存器STACK。存储器寻址粒度为字节。数据存储以32位字对准。采用32位定长指令格式，采用Load/Store结构，ALU指令采用三地址格式。支持有符号和无符号整数加、减、乘、除运算，并支持浮点数加、减、乘、除四种运算，支持与、或、异或、非4种逻辑运算，支持逻辑左移、逻辑右移、算术右移、循环右移4种移位运算，支持Load/Store操作，支持地址/立即数加载操作，支持无条件转移和为0转移、非0转移、无符号>转移、无符号<转移、有符号>转移、有符号<转移等条件转移。
Platform: | Size: 43008 | Author: haotianr | Hits:

[VHDL-FPGA-Verilog] ALU_verilog

Description: 用verilog语言编写的4位算术逻辑单元ALU,功能参考74181，包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
Platform: | Size: 2048 | Author: 颜心馨 | Hits:

[Software Engineering] 07302529

Description: 计算机组成原理实验（MAX PLUS） 1.ALU设计 2.MEM设计 3.32位2选1选择器-Principles of Computer Organization Experiment (MAX PLUS) 1.ALU design 2.MEM design 3.32 2 election 1 selector
Platform: | Size: 244736 | Author: 翁浩达 | Hits:

[VHDL-FPGA-Verilog] alu

Description: 加法器FPGA 实现，精简，快速，高效，有仿真文件-adder base on FPGA ，verilog HDL
Platform: | Size: 1024 | Author: lijiaming | Hits:

[VHDL-FPGA-Verilog] spartan_alu_8_bit

Description: Verilog based 8 bit ALU module, implemented on Spartan 3E FPGA.
Platform: | Size: 9216 | Author: ifusmell | Hits:

[VHDL-FPGA-Verilog] ALU8

Description: ALU算术逻辑单元，8位，含源程序以及仿真后的波形图-ALU arithmetic logic unit 8, including source code, as well as post-simulation waveform
Platform: | Size: 29696 | Author: 赵剑平 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: a simple 4 bit alu in verilog
Platform: | Size: 612352 | Author: priya | Hits:

[VHDL-FPGA-Verilog] alu

Description: mcu，risc cpu Verilog源代码-mcu，risc cpu Verilog
Platform: | Size: 4096 | Author: yzhang | Hits:

[VHDL-FPGA-Verilog] alu

Description: arithmetical-logic unit design in Verilog
Platform: | Size: 1024 | Author: Iuliana, Chiuchisan | Hits:

[VHDL-FPGA-Verilog] alu

Description: the 8 bit alu by verilog
Platform: | Size: 91136 | Author: pedram | Hits:

[VHDL-FPGA-Verilog] MIPS-ARM-ALU

Description: 用verilog描述语言实现的MIPS和ARM的ALU程序。-Verilog description language with the MIPS and ARM ALU program.
Platform: | Size: 2529280 | Author: | Hits:
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